By Ricardo Lourenço, Nuno Lourenço, Nuno Horta
This paintings addresses the examine and improvement of an cutting edge optimization kernel utilized to analog built-in circuit (IC) layout. relatively, this works describes the transformations contained in the AIDA Framework, an digital layout automation framework totally constructed via on the built-in Circuits Group-LX of the Instituto de Telecomunicações, Lisbon. It focusses on AIDA-CMK, through bettering AIDA-C, that's the circuit optimizer section of AIDA, with a brand new multi-objective multi-constraint optimization module that constructs a base for a number of set of rules implementations. The proposed answer implements 3 methods to multi-objective multi-constraint optimization, specifically, an evolutionary strategy with NSGAII, a swarm intelligence process with MOPSO and stochastic hill mountain climbing technique with MOSA. furthermore, the applied constitution permits the simple hybridization among kernels remodeling the former basic NSGAII optimization module right into a extra developed and flexible module helping a number of unmarried and multi-kernel algorithms. the 3 multi-objective optimization techniques have been tested with CEC2009 benchmarks to limited multi-objective optimization and established with genuine analog IC layout difficulties. The completed effects have been in comparison by way of functionality, utilizing statistical effects received from a number of self reliant runs. eventually, a few hybrid methods have been additionally experimented, giving a foretaste to quite a lot of possibilities to discover in destiny work.
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Additional resources for AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing
The analysis of the obtained fronts shows a notorious degradation of the MOPSO performance, when dealing with problems of larger dimension. The degradation in CF1 and CF2 is not that large, but is notorious for the other problems (CF3–CF7). Regarding both MOSA and NSGAII the performance looks similar in Fig. 3. However, if the MOSPO is removed, a closer look shows that the implemented MOSA greatly outperforms the NSGA-II in CF3–CF7, as illustrated in Fig. 4. 3 Evaluation of the Multi-kernel Methods 45 Fig.
8 were considered. In Fig. 8a is presented a simple version that shuffles and reassigns the elements to the different kernels taking advantage of the different exploration techniques. In Fig. 8b a more greedy approach is used, following the same principle of using different methods to explore the same space but selects only the best individuals using rank and crowding distance, and setting the same individuals to all the kernels. Another approach is shown in Fig. 8c, where the elements are sorted using some criteria and split into blocks allowing the algorithms to explore different regions of the search space.
The evolution of the best FOM, bandwidth and current consumption with the number of simulations for each optimization kernel in both runsets is illustrated in Fig. 5. The analysis of the results shows that NSGA-II is much more efﬁcient than MOPSO or MOSA, requiring fewer simulations to achieve the same solutions, and it is more consistent throughout the 10 runs. Unlike the results in , where even using MOSO and MOPSO, multiple oscillators are designed showing the state-ofthe-art FOMs even though, as in this work, the FOM was not being explicitly optimized.
AIDA-CMK: Multi-Algorithm Optimization Kernel Applied to Analog IC Sizing by Ricardo Lourenço, Nuno Lourenço, Nuno Horta